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VeriLogger is a low-cost, full-feature Verilog simulator to our line of EDA products. VeriLogger has all the features that you've come to expect from a professional simulation package: waveform viewing, single step debugging, point-and-click break points, color syntax editing, and console execution. Also included is a powerful hierarchical browser that displays the structural relationships of the modules in your design. VeriLogger Pro supports the IEEE-1364 standard including all the RTL, behavioral, and synthesizable constructs.

Current Version:   ??

License Type:   Commercial (a free version with limitations is also available)

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Source Code Availability:   No

Available Binary Packages:

  • Debian Package:   No
  • RedHat RPM Package:   No
  • Other Packages:   ??

Targeted Platforms:

Windows 95/98/NT, Macintosh, Linux (command line version only), Solaris, HP-UX

Software/Hardware Requirements:


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