![]() |
![]() |
![]() |
THUD
THUD is a register transfer level (RTL) simulation environment optimized for cycle-based designs. The design is expressed in TH, a Scheme-based hardware description language (HDL), although there are (preliminary) ways to read simple Verilog. THUD can be used in batch mode or through one of its interactive faces. Primitives are provided for session management; file format translation; scheduling; data structure examination and simulation. This is in addition to a Scheme development environment afforded by GUILE. The distribution also includes a budding QA environment and documentation in Info and HTML formats: a user's manual and a semi-"literate" internals doc.
|
Current Version: 0.22
License Type: GPL
|
Home Site:
Source Code Availability: Yes
Available Binary Packages:
Targeted Platforms: Software/Hardware Requirements:
|
Other Links:
Mailing Lists/USENET News Groups: User Comments:
See A Screen Shot? (Not Yet)
|