SLS SLS is a switch-level simulator that can be used to simulate the logical and timing behavior of digital MOS circuits. In the simulator, transistors are modeled by grounded capacitors and a switched resistor. Each node in the network has a logic state O, I or X (for unknown), and each transistor has a state on, off or undefined. Many characteristics of MOS circuits can be modeled accurately, including: ratioed, complementary and precharged logic; dynamic and static storage; pass transistors; busses; and charge sharing. Because the simulator is a local-event-driven simulator, also large networks can quickly be simulated.

Current Version:   ?? License Type:   GPL

Home Site: http://dutentb.et.tudelft.nl/research/sls.html Source Code Availability:   Yes, ftp://cas.et.tudelft.nl/pub/sls Available Binary Packages: Debian Package:   No RedHat RPM Package:   No Other Packages:   Yes, see Home Site Targeted Platforms: Tested on HP700, SunOS4.1, Solaris 5.5, DEC, Linux Software/Hardware Requirements: C++ compiler

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