SIS SIS is an interactive tool for synthesis and optimization of sequential circuits. Given a state transition table, a signal transition graph, or a logic-level description of a sequential circuit, it produces an optimized net-list in the target technology while preserving the sequential input-output behavior. Many different programs and algorithms have been integrated into SIS, allowing the user to choose among a variety of techniques at each stage of the process. It is built on top of MIS II and includes all (combinational) optimization techniques therein as well as many enhancements. SIS serves as both a framework within which various algorithms can be tested and compared, and as a tool for automatic synthesis and optimization of sequential circuits.

Current Version:   1.2 License Type:   Free to public via anonymous ftp, or on tape for a small fee

Home Site: http://www-cad.eecs.berkeley.edu/Software/software.html Source Code Availability:   Yes Available Binary Packages: Debian Package:   No RedHat RPM Package:   No Other Packages:   No Targeted Platforms: Unix (Linux patch available) Software/Hardware Requirements: None

Other Links: None Mailing Lists/USENET News Groups: sis@ic.eecs.berkeley.edu for questions/comments User Comments: None See A Screen Shot? (Not Yet)

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