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The BlueHDL simulation tools provide VHDL and SystemC digital simulation capabilities.
They offer professional quality at low prices, while providing an intuitive, easy-to-use interface. The Student Versions are free and are available for downloading now. The compilers, simulator and graphical user interface also offer some unique and interesting features such as:
- behavioral, RTL and structural level simulation
- simple "one-button compile" and "one-button simulate" operations
- multilingual nature, using a single compiler for both VHDL and Verilog
- synthesis syntax checking
- sensitivity list (event list) completeness checking
- Verilog type checking beyond the Verilog standard
- automatic set up of VHDL libraries
- compile source code in any order, no need to recompile higher levels
- printf-like $monitor and $display debugging commands
- Object-Oriented C++ compiler based on PCCTS from Purdue University
Current Version: ??
License Type: Commercial, Free Student Version
Source Code Availability: No
Available Binary Packages:
- Debian Package: No
- RedHat RPM Package: No
- Other Packages: ??
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