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ALLIANCE is a complete set of CAD tools and portable libraries for research and education in digital VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, automatic place and route, DRC, extractor, functional abstraction and formal proof tools etc... All the ALLIANCE cell libraries use a symbolic layout approach in order to provide process independence: Cmos process from 1.6 micron to 0.8 micron have been successfully targetted.

Current Version:   4.0

License Type:   GPL

Home Site:

Source Code Availability:   Yes

Available Binary Packages:

  • Debian Package:   No
  • RedHat RPM Package:   No
  • Other Packages:   No

Targeted Platforms:

Sparc, Linux (ELF, 2.0.30), DEC, etc.

Software/Hardware Requirements:

tested with gcc and K&R cc compilers.

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