SMV
The SMV system is a tool for checking finite state systems against specifications in the temporal logic CTL. The input language of SMV is designed to allow the description of finite state systems that range from completely synchronous to completely asynchronous, and from the detailed to the abstract. One can readily specify a system as a synchronous Mealy machine, or as an asychronous network of abstract, nondeterministic processes. The language provides for the modular hierachical descriptions, and for the definition of reusable components.
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Current Version: 2.5.3.1
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